Studies of CdTe Thin Films and Solar Cells Grown by MOCVD

Abstract

This thesis presents the results of investigation of arsenic doped CdTe thin films and CdTe/CdS solar cells grown by MOCVD. Particular emphasis has been placed on the electrical and microstructural characterisation of layers and structures, and the effects of the post-deposition heat treatment of the materials and devices. For a growth temperature of 400 c, using dimethylcadmium, di-isopropyltelluride and dimethylamino arsine as precursors, the incorporation of arsenic in thin films of CdTe is dependent on the ratio of organometallics partial pressures in the growth ambient (VI/II ratio) with concentration of up to 2x1 o'9 at.cm'^ for a VI/II ratio of 0.73. The dependency of the lateral resistively upon arsenic incorporation was investigated and found to increase for higher arsenic concentrations. The influence of the growth temperature and VI/II ratio on the texture and lattice parameter of the films is also examined. Investigations of the microstructure of absorber layers of CdTe/CdS bi-layers revealed that grain size and preferred orientation are dependent on the thickness of the films which is itself a function of the substrate position on the susceptor block. The influence of the post-deposition heat treatment with and without CdCİ2 was investigated by means of XRD and SEM. In both cases annealing causes a recrystallisation from the [111] into the [422] direction and a reduction in the in- plane lattice stress of the CdTe layers. The grain size increases from 0.7 to 1.3 μm only in the presence of CdCl(_2) and Burke and Turnbull's grain growth exponents of 7 and 〜4 are derived for ~8 μm thick films treated at 440 c and 400 c.The activation of CdTe/CdS bi-layerร using the CdCl(_2) heat treatment shows that only devices with ~4 μm CdTe can be made into efficient solar cells. Thinner and thicker structures produce cells exhibiting no photoresponse due to the lack of sustainability of the thin layers during treatment and the particularly low conductivity of the thicker layers. Optimisation of the CdCl(_2) treatment indicates that best devices are produced following an 18 min annealing at 420 c for structures coated with a 30 nm layer of CdCİ2. The cells are limited by a poor fill factor arising from low shunt and high series resistances indicated by a high reverse saturation current and diode quality factor.