Non-equilibrium generation lifetime measurements on MOS devices

Abstract

This thesis is concerned with the study of the interface and hulk properties of n-type and p-type silicon MOS devices. The widely used quasi-static technique has been applied to the interface state analysis. The method (due to Kuhn) consists of applying a linear voltage ramp to the sample at a sufficiently low sweep rate so as to maintain the device in quasi-eqiulibrium. The non-equilibrium characteristics of the device were measured by the fast ramp technique. From sudi characteristics, the bulk trap density and the generation lifetime were obtained. An analogue circuit was built to give a direct plot of surface potential versus gate voltage in equilibrium as well as in non-equilibrium conditions. Such plots were compared with those generated theoretically and with those obtained using graphical integration of the I-V curves. There was a close agreement between all these results. The transient charge due to small voltage steps applied to an MOS capacitor in inversion was measured. The results were analysed to give the generation lifetime which was compared with that obtained from the fast ramp non-equilibrium analysis. The values agreed well for an n-type sample, but they differed by a factor of three for a p-type one. Further experimental and theoretical work will be needed to find the reason for this discrepancy.